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Publications
Journal articles
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Rajasekhar Nagulapalli1, Nabil Yassine1,*, Amr A. Tammam1, Steve Barker1 Khaled Hayatleh1, 'A 10.5 ppm/OC Modified Sub-1 V Bandgap in 28 nm CMOS Technology with only Two Operating Points'
Electronics [in press] (ISSN 2079-9292) (2024)
eISSN: 2079-9292AbstractPublished hereReference voltage/current generation is essential to the Analog circuit design. There have been several ways to generate quality reference voltage using Bandgap Reference (BGR). There are mainly 2 types: Current mode and Voltage mode. The current mode bandgap reference (CBGR) is widely accepted in the industry due to the output voltage that is below 1V. However, its drawbacks include a lack of proportional to absolute temperature (PTAT) current availability, large silicon area, multiple operating points, and large temperature coefficient (TC). In this paper, various operating points are explained in detail with diagrams. Similar to the conventional voltage mode bandgap reference (VBGR) circuits, modifications of the existing circuits with only two operating points have also been proposed. Moreover, the proposed BGR occupies a much smaller area due to eliminating the Complimentary to Absolute temperature (CTAT) current-generating resistor. A new self-biased opamp was introduced to operate from a 1.05V supply, reducing systematic offset and TC of the BGR. The proposed solution has been implemented in 28nm CMOS TSMC technology, and extraction simulations were performed to prove the robustness of the proposed circuit. The targeted mean BGR output is 500 mV, and across the industrial temperature range (-40 to 125°C), the simulated TC is approximately 10.5 ppm/°C. The integrated output noise within the observable frequency band is 19.6 µV (rms). A 200-point Monte Carlo simulation displays a histogram with a 2.6 mV accuracy of 1.2% (+/- 3-sigma). The proposed BGR circuit consumes 32.8 µW of power from a 1.05 V supply in a Fast process, Hot (125°C) corner. It occupies a silicon area of 81 x 42 µm (including capacitors). This design can aim for biomedical and sensor applications.
Keywords: Bandgap reference; Noise; Operating points; Self-bias; Offset phase-margin
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R. Nagulapalli, K. Hayatleh, S. Barker, A. A. Tammam, F. J. Lidgey and N. Yassine, 'A High Sensitivity and Low Power Circuit for the Measurement of Abnormal Blood Cell Levels'
Journal of Circuits, Systems, and Computers 29 (4) (2019)
ISSN: 0218-1266 eISSN: 1793-6454AbstractPublished here Open Access on RADARThis paper describes a technique to detect blood cell levels based on the time-period modulation of a relaxation oscillator loaded with an Inter Digitated Capacitor (IDC). A digital readout circuit has been proposed to measure the time-period difference between the two oscillators loaded with samples of healthy and (potentially) unhealthy blood. A prototype circuit was designed in 65nm CMOS technology and post-layout simulations shows 15.25aF sensitivity. The total circuit occupies 2184µm2 silicon area and consumes 216µA from a 1V power supply.
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R. Nagulapalli, K. Hayatleh, S. Barker, A.A. Tammam, N. Yassine, B. Yassine, M. Ben-Esmael., 'A Low Noise Amplifier Suitable for Biomedical Recording Analog Front-End in 65nm CMOS Technology'
Journal of Circuits, Systems, and Computers 28 (8) (2018)
ISSN: 0218-1266 eISSN: 1793-6454AbstractThis paper presents a fully integrated Front-end, low noise amplifier, dedicated to the processing of various types of bio-medical signals, such as Electrocardiogram (ECG), Electroencephalography (EEG), Axon Action Potential (AAP). A novel noise reduction technique, for an operational transconductance amplifier (OTA), has been proposed. This adds a current steering branch parallel to the differential pair, with a view to reducing the noise contribution by the cascode current sources. Hence, this reduces the overall input referred noise of the Low Noise Amplifier (LNA), without adding any additional power. The proposed technique implemented in 65nm CMOS technology achieves 30dB closed loop voltage gain, 0.05Hz lower cut-off frequency and 100MHz 3-dB bandwidth. It operates at 1.2V power supply and draws 1µA static current. The prototype described in this paper occupies 3300µm2silicon area.Published here Open Access on RADAR -
R. Nagulapalli, K. Hayatleh, S. Barker, A.A. Tammam, P. Georgiou* & F. J. Lidgey, 'A 0.55V Bandgap reference with a 59ppm/0c Temperature coefficient'
Journal of Circuits, Systems, and Computers 28 (7) (2018)
ISSN: 0218-1266 eISSN: 1793-6454AbstractThis paper presents a novel low power, low voltage CMOS bandgap reference (BGR) that overcomes the problems with existing BJT-based reference circuits, by using a MOS transistor operating in subthreshold region. A proportional to absolute temperature (PTAT) voltage is generated by exploiting the self-bias cascode branch, while a Complementary to Absolute Temperature (CTAT) voltage is generated by using the threshold voltage of the transistor. The proposed circuit is implemented in 65nm CMOS technology. Post-layout simulation results show that the proposed circuit works with a supply voltage of 0.55V, and generates a 286mV reference voltage with a temperature coefficient of 59ppm/°C. The circuit takes 413nA current from 0.55V supply and occupies 0.00986mm2 of active area .Published here Open Access on RADAR -
R. Nagulapalli, K. Hayatleh, S. Barker, S. Zourob, N. Yassine, S. Raparthy and A. A. Tammam, 'A novel high CMRR Trans-Impedance Instrumentation Amplifier for biomedical applications'
Analog Integrated Circuits and Signal Processing 98 (2018) pp.233-241
ISSN: 0925-1030 eISSN: 1573-1979AbstractA compact high gain current mode instrumentation amplifier (IA) has been proposed for biomedical imaging applications. Conventional IAs rely on several matching resistors which occupies a lot of silicon area, the input and output common mode voltages are exactly same and the maximum applied signal amplitude is limited by internal node voltage swings. The present proposal eliminates the need for matching resistors by processing signals in the current mode. Hence input amplitudes are no longer limited by the voltage headroom and input and output common-mode voltages can be independent. An amplifier with a differential gain greater than 52dB and a common mode rejection ratio (CMRR) greater than 120dB has been implemented in 65nm CMOS Technology and Post layout simulations were presented. The total circuit occupies 4500um2 silicon area and circuit consumes ~260μA from 1.8V power supply.Published here Open Access on RADAR -
Tammam AA, Hayatleh K, Barker S, Ben-Esmael M, Terzopoulos N, 'Improved designs for current feedback op-amps'
International Journal of Electronics Letters 4 (2) (2015) pp.215-227
ISSN: 2168-1724AbstractThe performance of the current feedback op-amps (CFOAs) is very much determined by the input stage of CFOAs, including common-mode rejection ratio (CMRR). Two new CFOAs topologies are presented in this article: one topology uses a cascoding technique, and the second one uses a bootstrapping technique, both of which provide a much better CMRR and lower DC offset voltage than the conventional CFOAs. Moreover, the new CFOAs design exhibits an extended high frequency bandwidth, with a gain accuracy improvement. Applications requiring constant bandwidth with variable (closed loop) gain will benefit from the proposed topologies.Published here Open Access on RADAR